14. Coprocessor 0

14.5 PageMask Register (5)


The
PageMask register is a read/write register used for reading from or writing to the TLB; it holds a comparison mask that sets the variable page size for each TLB entry, as shown in Table 14-6. Format of the register is shown in Figure 14-5.

TLB read and write operations use this register as either a source or a destination; when virtual addresses are presented for translation into physical address, the corresponding bits in the TLB identify which virtual address bits among bits 24:13 are used in the comparison. When the Mask field is not one of the values shown in Table 14-6, the operation of the TLB is undefined. The 0 field is reserved; it must be written as zeroes, and returns zeroes when read.



Figure 14-5 PageMask Register

Table 14-6 Mask Field Values for Page Sizes




Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96


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